[all-commits] [llvm/llvm-project] 4e2c41: [NFC][InstCombine] Add test for sign-extending NSW...
Roman Lebedev via All-commits
all-commits at lists.llvm.org
Tue Apr 20 14:33:52 PDT 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 4e2c4190bed7596980bf474db8c6b4ebbad97203
https://github.com/llvm/llvm-project/commit/4e2c4190bed7596980bf474db8c6b4ebbad97203
Author: Roman Lebedev <lebedev.ri at gmail.com>
Date: 2021-04-21 (Wed, 21 Apr 2021)
Changed paths:
A llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
Log Message:
-----------
[NFC][InstCombine] Add test for sign-extending NSW trunc (PR49543)
Commit: 1e6ca23ab8e350c7bab5d7f93e4d3dee18d180cc
https://github.com/llvm/llvm-project/commit/1e6ca23ab8e350c7bab5d7f93e4d3dee18d180cc
Author: Roman Lebedev <lebedev.ri at gmail.com>
Date: 2021-04-21 (Wed, 21 Apr 2021)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/sext-of-trunc-nsw.ll
Log Message:
-----------
[InstCombine] `sext(trunc(x)) --> sext(x)` iff trunc is NSW (PR49543)
If we can tell that trunc only chops off sign bits, and not all of them,
then we can simply sign-extend the trunc's source.
Commit: 8cff391995a91e851224b3aa428621c0ea89de18
https://github.com/llvm/llvm-project/commit/8cff391995a91e851224b3aa428621c0ea89de18
Author: Roman Lebedev <lebedev.ri at gmail.com>
Date: 2021-04-21 (Wed, 21 Apr 2021)
Changed paths:
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
Log Message:
-----------
[NFC][InstSimplify] Add one more test for unneeded 'and'
Commit: ea1a0d7c9ae3e5232a4163fc67efad4aabd51f2b
https://github.com/llvm/llvm-project/commit/ea1a0d7c9ae3e5232a4163fc67efad4aabd51f2b
Author: Roman Lebedev <lebedev.ri at gmail.com>
Date: 2021-04-21 (Wed, 21 Apr 2021)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstSimplify/AndOrXor.ll
Log Message:
-----------
[InstSimplify] Bypass no-op `and`-mask, using known bits (PR49543)
We already special-cased a few interesting patterns,
but that is strictly less powerful than using KnownBits.
So instead get the known bits for the operand of `and`,
and iff all the unset bits of the `and`-mask are known to be zeros
in the operand, we can omit said `and`.
Commit: 0ea464824aa1fd28f86465d1671c7fd956cc514b
https://github.com/llvm/llvm-project/commit/0ea464824aa1fd28f86465d1671c7fd956cc514b
Author: Roman Lebedev <lebedev.ri at gmail.com>
Date: 2021-04-21 (Wed, 21 Apr 2021)
Changed paths:
A llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll
Log Message:
-----------
[NFC][InstCombine] Add tests for sext-of-trunc-nuw-of-lshr (PR49543)
Commit: 41b71f718b94c6f12bbaa670e97cabb070308ed2
https://github.com/llvm/llvm-project/commit/41b71f718b94c6f12bbaa670e97cabb070308ed2
Author: Roman Lebedev <lebedev.ri at gmail.com>
Date: 2021-04-21 (Wed, 21 Apr 2021)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/lshr-trunc-sext-to-ashr-sext.ll
Log Message:
-----------
[InstCombine] "Bypass" NUW trunc of lshr if we are going to sext the result (PR49543)
This is a more convoluted form of the same pattern "sext of NSW trunc",
but in this case the operand of trunc was a right-shift,
and the truncation chops off just the zero bits that were shifted-in.
Compare: https://github.com/llvm/llvm-project/compare/1e202e8f393a...41b71f718b94
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