[all-commits] [llvm/llvm-project] 2a419a: [X86][SSE] combineX86ShuffleChain - check if we're...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a419a0b9957ebac9e11e4b43bc9fbe42a9207df
      https://github.com/llvm/llvm-project/commit/2a419a0b9957ebac9e11e4b43bc9fbe42a9207df
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-04-20 (Tue, 20 Apr 2021)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAG.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/oddshuffles.ll
    M llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll

  Log Message:
  -----------
  [X86][SSE] combineX86ShuffleChain - check if we're blending with zero into already zero elements

Add a SelectionDAG::MaskedElementsAreZero helper that wraps SelectionDAG::MaskedValueIsZero testing for entirely zero vector elements


  Commit: da764628e38d098c5776aee309ed3bb63deec7f1
      https://github.com/llvm/llvm-project/commit/da764628e38d098c5776aee309ed3bb63deec7f1
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-04-20 (Tue, 20 Apr 2021)

  Changed paths:
    A llvm/test/Transforms/PhaseOrdering/pr36760.ll

  Log Message:
  -----------
  [PhaseOrdering] Add test case for PR36760

Ensures that the correct sequence of simplifycfg/instcombine/sroa reduce the IR to just a icmp+select


Compare: https://github.com/llvm/llvm-project/compare/af870e11aed7...da764628e38d