[all-commits] [llvm/llvm-project] 620fdb: GlobalISel: Defer register creation in handleAssig...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 620fdb9671d0609c43cad86d38176586d7a2b157
      https://github.com/llvm/llvm-project/commit/620fdb9671d0609c43cad86d38176586d7a2b157
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2021-04-20 (Tue, 20 Apr 2021)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp

  Log Message:
  -----------
  GlobalISel: Defer register creation in handleAssignments

This is currently built on top of the SelectionDAG call lowering, but
does not use it the same way. SelectionDAG passes legalized types to
the assignment functions, and the tablegenerated assignment functions
may change the value types expected for registers. This does not
change the types used, just moves the register creation to help fix
this in the future.

Defer the register creation until after all of the assignment
decisions have been made. This will also help have correct tail call
compatibility checking in a future change. Currently it does not work
as expected for any arguments split across multiple registers.