[all-commits] [llvm/llvm-project] 78a871: [ARM] Use ProcResGroup in Cortex-M7 scheduling model

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 78a871abf7018f4a288b773c9c89f99cd5c66b9c
      https://github.com/llvm/llvm-project/commit/78a871abf7018f4a288b773c9c89f99cd5c66b9c
  Author: David Penry <david.penry at arm.com>
  Date:   2021-04-19 (Mon, 19 Apr 2021)

  Changed paths:
    M llvm/lib/Target/ARM/ARMScheduleM7.td
    A llvm/test/CodeGen/ARM/cortex-m7-wideops.mir
    M llvm/test/tools/llvm-mca/ARM/m7-fp.s
    M llvm/test/tools/llvm-mca/ARM/m7-int.s
    M llvm/test/tools/llvm-mca/ARM/m7-negative-readadvance.s

  Log Message:
  -----------
  [ARM] Use ProcResGroup in Cortex-M7 scheduling model

Used to model structural hazards on FP issue, where some
instructions take up 2 issue slots and others one as well
as similar structural hazards on load issue, where some
instructions take up two load lanes and others one.

Differential Revision: https://reviews.llvm.org/D98977