[all-commits] [llvm/llvm-project] c52dbd: [InstCombine] add tests for min/max with negated o...

RotateRight via All-commits all-commits at lists.llvm.org
Thu Apr 8 11:47:43 PDT 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c52dbdbc33b998e43edbc21b6c150bda5f5516a2
      https://github.com/llvm/llvm-project/commit/c52dbdbc33b998e43edbc21b6c150bda5f5516a2
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-04-08 (Thu, 08 Apr 2021)

  Changed paths:
    M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll

  Log Message:
  -----------
  [InstCombine] add tests for min/max with negated operand; NFC


  Commit: 5094e1279eb2e168bf6818b368bf6ff4835de2bc
      https://github.com/llvm/llvm-project/commit/5094e1279eb2e168bf6818b368bf6ff4835de2bc
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-04-08 (Thu, 08 Apr 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll

  Log Message:
  -----------
  [InstCombine] fold min/max intrinsic with negated operand to abs

The smax case shows up in https://llvm.org/PR49885 .
The others seem unlikely, but we might as well try
for uniformity (although that could mean an extra
instruction to create "nabs").

smax -- https://alive2.llvm.org/ce/z/8yYaGy
smin -- https://alive2.llvm.org/ce/z/0_7zc_
umax -- https://alive2.llvm.org/ce/z/EcsZWs
umin -- https://alive2.llvm.org/ce/z/Xw6WvB


Compare: https://github.com/llvm/llvm-project/compare/02ef9963e1ad...5094e1279eb2


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