[all-commits] [llvm/llvm-project] b614ad: [mlir] add support for index type in vectors.

[Tobias Gysi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b614ada0e80fe1af00294e8460f987dc6a7e4d5b
      https://github.com/llvm/llvm-project/commit/b614ada0e80fe1af00294e8460f987dc6a7e4d5b
  Author: Tobias Gysi <gysit at google.com>
  Date:   2021-04-08 (Thu, 08 Apr 2021)

  Changed paths:
    M mlir/docs/Rationale/Rationale.md
    M mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
    M mlir/include/mlir/Dialect/Vector/VectorOps.td
    M mlir/include/mlir/IR/BuiltinTypes.td
    M mlir/include/mlir/IR/OpBase.td
    M mlir/include/mlir/Interfaces/DataLayoutInterfaces.h
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
    M mlir/lib/Dialect/Vector/CMakeLists.txt
    M mlir/lib/Dialect/Vector/VectorOps.cpp
    M mlir/lib/Dialect/Vector/VectorTransforms.cpp
    M mlir/lib/IR/BuiltinAttributes.cpp
    M mlir/lib/IR/BuiltinTypes.cpp
    M mlir/lib/Interfaces/DataLayoutInterfaces.cpp
    M mlir/lib/Parser/TypeParser.cpp
    M mlir/test/Conversion/StandardToLLVM/standard-to-llvm.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Dialect/Vector/ops.mlir
    M mlir/test/IR/invalid-ops.mlir
    M mlir/test/IR/invalid.mlir
    A mlir/test/Integration/Dialect/Vector/CPU/test-index-vectors.mlir

  Log Message:
  -----------
  [mlir] add support for index type in vectors.

The patch enables the use of index type in vectors. It is a prerequisite to support vectorization for indexed Linalg operations. This refactoring became possible due to the newly introduced data layout infrastructure. The data layout of a module defines the bitwidth of the index type needed to verify bitcasts and similar vector operations.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D99948