[all-commits] [llvm/llvm-project] 4773dd: [GlobalISel] Add G_SBFX + G_UBFX (bitfield extract...

[Jessica Paquette via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4773dd5ba9993e127586a5e5b1993d431a47372c
      https://github.com/llvm/llvm-project/commit/4773dd5ba9993e127586a5e5b1993d431a47372c
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2021-03-19 (Fri, 19 Mar 2021)

  Changed paths:
    M llvm/docs/GlobalISel/GenericOpcode.rst
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/lib/CodeGen/MachineVerifier.cpp
    A llvm/test/MachineVerifier/test_g_ubfx_sbfx.mir
    M llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp

  Log Message:
  -----------
  [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes)

There is a bunch of similar bitfield extraction code throughout *ISelDAGToDAG.

E.g, ARMISelDAGToDAG, AArch64ISelDAGToDAG, and AMDGPUISelDAGToDAG all contain
code that matches a bitfield extract from an and + right shift.

Rather than duplicating code in the same way, this adds two opcodes:

- G_UBFX (unsigned bitfield extract)
- G_SBFX (signed bitfield extract)

They work like this

```
%x = G_UBFX %y, %lsb, %width
```

Where `lsb` and `width` are

- The least-significant bit of the extraction
- The width of the extraction

This will extract `width` bits from `%y`, starting at `lsb`. G_UBFX zero-extends
the result, while G_SBFX sign-extends the result.

This should allow us to use the combiner to match the bitfield extraction
patterns rather than duplicating pattern-matching code in each target.

Differential Revision: https://reviews.llvm.org/D98464