[all-commits] [llvm/llvm-project] 90ecb8: [AArch64] Rewrite (add, csel) to cinc

[sjoerdmeijer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 90ecb862a003d581136842dcdc213315727d50e2
      https://github.com/llvm/llvm-project/commit/90ecb862a003d581136842dcdc213315727d50e2
  Author: Sjoerd Meijer <sjoerd.meijer at arm.com>
  Date:   2021-03-18 (Thu, 18 Mar 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/arm64-csel.ll
    M llvm/test/CodeGen/AArch64/half.ll

  Log Message:
  -----------
  [AArch64] Rewrite (add, csel) to cinc

Don't rewrite an add instruction with 2 SET_CC operands into a csel
instruction. The total instruction sequence uses an extra instruction and
register. Preventing this allows us to match a `(add, csel)` pattern and
rewrite this into a `cinc`.

Differential Revision: https://reviews.llvm.org/D98704