[all-commits] [llvm/llvm-project] 0b2aae: [AArch64] Zero extended extract_vector_elt pattern

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0b2aae42e5ea16a746d91a2945bf1e399fe485e3
      https://github.com/llvm/llvm-project/commit/0b2aae42e5ea16a746d91a2945bf1e399fe485e3
  Author: David Green <david.green at arm.com>
  Date:   2021-03-15 (Mon, 15 Mar 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/build-vector-extract.ll

  Log Message:
  -----------
  [AArch64] Zero extended extract_vector_elt pattern

This adds a pattern for i64 zext_inreg(i32 extract_vector_elt X),
producing a single UMOVvi16 instruction that is already expected to
clear the top bits. The exact pattern that this matches is
and(anyext(vector_extract X, lane), 0xff), similar to the sext patterns
higher up in the same file.

Differential Revision: https://reviews.llvm.org/D98599