[all-commits] [llvm/llvm-project] 3fea92: [RISCV] Support INSERT_SUBVECTOR on vector masks

[Fraser Cormack via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3fea9226eecd2069bea93c4fe5955b0b5ff316f7
      https://github.com/llvm/llvm-project/commit/3fea9226eecd2069bea93c4fe5955b0b5ff316f7
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2021-03-01 (Mon, 01 Mar 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll

  Log Message:
  -----------
  [RISCV] Support INSERT_SUBVECTOR on vector masks

Like with EXTRACT_SUBVECTOR, INSERT_SUBVECTOR poses a problem
for vector masks as RVV isn't able to slide mask types around. We choose
instead to bitcast to equivalently-sized i8 types where we can, else we
zero-extend, perform the operation, and truncate back down.

One test was left disabled due to a crash in the legalizer.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97559