[all-commits] [llvm/llvm-project] e80ca3: [RISCV] Fix INSERT/EXTRACT_SUBVECTOR on fractional...

[Fraser Cormack via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e80ca3af82f8177a1b239bab6bb25d08ec86adeb
      https://github.com/llvm/llvm-project/commit/e80ca3af82f8177a1b239bab6bb25d08ec86adeb
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2021-03-01 (Mon, 01 Mar 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll

  Log Message:
  -----------
  [RISCV] Fix INSERT/EXTRACT_SUBVECTOR on fractional LMUL types

This patch fixes a bug where the lowering for INSERT_SUBVECTOR and
EXTRACT_SUBVECTOR would insist on first extracting a register-aligned
LMUL1 vector type before perfoming the slide up/down. This was even if
the vector was a fractional LMUL type, in which case the aligned
EXTRACT_SUBVECTOR was invalid.

This issue only occurred for scalable vector types, but a variety of
tests for both scalable and fixed-length vectors have been added to
ensure this does not regress in the future.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D97556