[all-commits] [llvm/llvm-project] 2885d1: [X86] Fold bitcast(logic(bitcast(X), Y)) --> logic...

Simon Pilgrim via All-commits all-commits at lists.llvm.org
Sun Feb 21 06:51:16 PST 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2885d1251f29f3676b2c99b4b3c19d6907272cc1
      https://github.com/llvm/llvm-project/commit/2885d1251f29f3676b2c99b4b3c19d6907272cc1
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-02-21 (Sun, 21 Feb 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-logic.ll
    M llvm/test/CodeGen/X86/known-signbits-vector.ll
    M llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
    M llvm/test/CodeGen/X86/memcmp-optsize.ll
    M llvm/test/CodeGen/X86/memcmp-pgso.ll
    M llvm/test/CodeGen/X86/memcmp.ll
    M llvm/test/CodeGen/X86/merge-consecutive-loads-512.ll
    M llvm/test/CodeGen/X86/pr40891.ll
    M llvm/test/CodeGen/X86/sse2.ll
    M llvm/test/CodeGen/X86/vec_saddo.ll
    M llvm/test/CodeGen/X86/vec_ssubo.ll
    M llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
    M llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll
    M llvm/test/CodeGen/X86/vector-reduce-and.ll
    M llvm/test/CodeGen/X86/vector-reduce-or.ll
    M llvm/test/CodeGen/X86/vector-reduce-xor.ll
    M llvm/test/CodeGen/X86/vector-trunc-packus.ll
    M llvm/test/CodeGen/X86/widen_cast-5.ll
    M llvm/test/CodeGen/X86/xor.ll

  Log Message:
  -----------
  [X86] Fold bitcast(logic(bitcast(X), Y)) --> logic'(X, bitcast(Y)) for int-int bitcasts

Extend the existing combine that handles bitcasting for fp-logic ops to also help remove logic ops across bitcasts to/from the same integer types.

This helps improve AVX512 predicate handling for D/Q logic ops and also allows DAGCombine's scalarizeExtractedBinop to remove some annoying gpr->simd->gpr transfers.

The concat_vectors regression in pr40891.ll will be addressed in a followup commit on this patch.

Differential Revision: https://reviews.llvm.org/D96206


  Commit: a6a258f1da37a678867bd29f7125417944bdecb2
      https://github.com/llvm/llvm-project/commit/a6a258f1da37a678867bd29f7125417944bdecb2
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-02-21 (Sun, 21 Feb 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/pr40891.ll

  Log Message:
  -----------
  [X86][AVX] Fold concat(extract_subvector(v0,c0), extract_subvector(v1,c1)) -> vperm2x128

Fixes regression exposed by removing bitcasts across logic-ops in D96206.

Differential Revision: https://reviews.llvm.org/D96206


Compare: https://github.com/llvm/llvm-project/compare/d9207d3f0bad...a6a258f1da37


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