[all-commits] [llvm/llvm-project] 66f2d0: [DAGCombiner] Transform (zext (select c, load1, lo...

[weiguozhi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 66f2d09ebf8d81d019a5524cdc5e7f88acbb7504
      https://github.com/llvm/llvm-project/commit/66f2d09ebf8d81d019a5524cdc5e7f88acbb7504
  Author: Guozhi Wei <carrot at google.com>
  Date:   2021-02-18 (Thu, 18 Feb 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/X86/select-ext.ll

  Log Message:
  -----------
  [DAGCombiner] Transform (zext (select c, load1, load2)) -> (select c, zextload1, zextload2)

If extload is legal, following transform
    (zext (select c, load1, load2)) -> (select c, zextload1, zextload2)
can save one ext instruction.

Differential Revision: https://reviews.llvm.org/D95086