[all-commits] [llvm/llvm-project] 60aa64: [GlobalISel] Add G_ASSERT_SEXT

[Jessica Paquette via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 60aa64644168a85009985f5d1a2e0b8b4a862b62
      https://github.com/llvm/llvm-project/commit/60aa64644168a85009985f5d1a2e0b8b4a862b62
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2021-02-17 (Wed, 17 Feb 2021)

  Changed paths:
    M llvm/docs/GlobalISel/GenericOpcode.rst
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
    M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-sext.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-hint.mir
    A llvm/test/MachineVerifier/test_g_assert_sext.mir
    A llvm/test/MachineVerifier/test_g_assert_sext_register_bank_class.mir

  Log Message:
  -----------
  [GlobalISel] Add G_ASSERT_SEXT

This adds a G_ASSERT_SEXT opcode, similar to G_ASSERT_ZEXT. This instruction
signifies that an operation was already sign extended from a smaller type.

This is useful for functions with sign-extended parameters.

E.g.

```
define void @foo(i16 signext %x) {
 ...
}
```

This adds verifier, regbankselect, and instruction selection support for
G_ASSERT_SEXT equivalent to G_ASSERT_ZEXT.

Differential Revision: https://reviews.llvm.org/D96890