[all-commits] [llvm/llvm-project] 799f78: [RISCV] Use bits<7> instead of bits<11> for the EE...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 799f7865c88e954eea4171d34e68721145836964
      https://github.com/llvm/llvm-project/commit/799f7865c88e954eea4171d34e68721145836964
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-02-17 (Wed, 17 Feb 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

  Log Message:
  -----------
  [RISCV] Use bits<7> instead of bits<11> for the EEW field size in the RISCVZvlsseg searchable table. NFCI

We only support 8, 16, 32, and 64 for EEW. These only need 7 bits
to represent.