[all-commits] [llvm/llvm-project] 4e127b: [PowerPC] Handle FP physical register in inline as...

[Sean Fertile via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4e127bce2d1133ba95a551d69bd0e8fc3b4f9e71
      https://github.com/llvm/llvm-project/commit/4e127bce2d1133ba95a551d69bd0e8fc3b4f9e71
  Author: Sean Fertile <sd.fertile at gmail.com>
  Date:   2021-02-17 (Wed, 17 Feb 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    A llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr-spe.ll
    A llvm/test/CodeGen/PowerPC/inline-asm-physical-fpr.ll

  Log Message:
  -----------
  [PowerPC] Handle FP physical register in inline asm constraint.

Do not defer to the base class when the register constraint is a
physical fpr. The base class will select SPILLTOVSRRC as the register
class and register allocation will fail on subtargets without VSX
registers.

Differential Revision: https://reviews.llvm.org/D91629