[all-commits] [llvm/llvm-project] c62b73: [AMDGPU] Correct rmw atomics s_waitcnt generation

[Tony Tye via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c62b737ad655f189cf76f4324ba04317133d6648
      https://github.com/llvm/llvm-project/commit/c62b737ad655f189cf76f4324ba04317133d6648
  Author: Tony Tye <Tony.Tye at amd.com>
  Date:   2021-02-17 (Wed, 17 Feb 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
    M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll

  Log Message:
  -----------
  [AMDGPU] Correct rmw atomics s_waitcnt generation

The AMD GPU SIMemoryLegalizer was using the ordering address space
rather than the instruction address space when determining the
s_waitcnt to generate to ensure that a read-modify-write atomic has
completed. This resulted in additional unnecessary counters being
waited on.

Differential Revision: https://reviews.llvm.org/D96743