[all-commits] [llvm/llvm-project] 6b280c: [RISCV] Use LLVMScalarOrSameVectorWidth to make av...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6b280ce34c13d78c951f381346ff6f73c34e5d28
      https://github.com/llvm/llvm-project/commit/6b280ce34c13d78c951f381346ff6f73c34e5d28
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-02-04 (Thu, 04 Feb 2021)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll

  Log Message:
  -----------
  [RISCV] Use LLVMScalarOrSameVectorWidth to make avoid needing to mention the index type for vrgatherei16 intrinsics.

Add .vv to the intrinsic name to be consistent with D95979.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D95981