[all-commits] [llvm/llvm-project] 8112a2: [X86][SSE] Add 'vectorized sum' test patterns

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8112a2598ce180ab4cd106f154a71e813fc28d91
      https://github.com/llvm/llvm-project/commit/8112a2598ce180ab4cd106f154a71e813fc28d91
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-01-11 (Mon, 11 Jan 2021)

  Changed paths:
    A llvm/test/CodeGen/X86/horizontal-sum.ll

  Log Message:
  -----------
  [X86][SSE] Add 'vectorized sum' test patterns

These are often generated when building a vector from the reduction sums of independent vectors.

I've implemented some typical patterns from various v4f32/v4i32 based off current codegen emitted from the vectorizers, although these tests are more about tweaking some hadd style backend folds to handle whatever the vectorizers/vectorcombine throws at us...