[all-commits] [llvm/llvm-project] ed95ca: [RISCV] Add an implementation of isFMAFasterThanFM...

[Craig Topper via All-commits]

  Branch: refs/heads/temp-test-main
  Home:   https://github.com/llvm/llvm-project
  Commit: ed95cafbc5fa9efbfe3f38da0b17efdb3806598c
      https://github.com/llvm/llvm-project/commit/ed95cafbc5fa9efbfe3f38da0b17efdb3806598c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-11-25 (Wed, 25 Nov 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/test/CodeGen/RISCV/double-arith.ll
    M llvm/test/CodeGen/RISCV/double-intrinsics.ll
    M llvm/test/CodeGen/RISCV/float-arith.ll
    M llvm/test/CodeGen/RISCV/float-intrinsics.ll

  Log Message:
  -----------
  [RISCV] Add an implementation of isFMAFasterThanFMulAndFAdd

Start with an assumption that FMA is faster than Fmul+FAdd. If thats not true
on some particular implementation we can add a tuning parameter in the future.

I've update the fmuladd test cases and added new test cases for fast math flag
based contraction.

Differential Revision: https://reviews.llvm.org/D91987