[all-commits] [llvm/llvm-project] be7d42: [PPC][AIX] Add vector callee saved registers for A...
Zarko Todorovski via All-commits
all-commits at lists.llvm.org
Tue Nov 24 20:02:23 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: be7d425edc64714564a079657ed4230e39c2cc90
https://github.com/llvm/llvm-project/commit/be7d425edc64714564a079657ed4230e39c2cc90
Author: Zarko Todorovski <zarko at ca.ibm.com>
Date: 2020-11-24 (Tue, 24 Nov 2020)
Changed paths:
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/Target/PowerPC/PPCCallingConv.td
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/test/CodeGen/PowerPC/aix-AppendingLinkage.ll
A llvm/test/CodeGen/PowerPC/aix-csr-vector.ll
M llvm/test/CodeGen/PowerPC/aix-func-align.ll
M llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
M llvm/test/CodeGen/PowerPC/aix-internal.ll
M llvm/test/CodeGen/PowerPC/aix-lower-block-address.ll
M llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
M llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
M llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
M llvm/test/CodeGen/PowerPC/aix-return55.ll
M llvm/test/CodeGen/PowerPC/aix-space.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-large.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-textdisassembly.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-toc.ll
M llvm/test/CodeGen/PowerPC/aix32-crsave.mir
M llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix-asm.ll
M llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix-asm.ll
M llvm/test/CodeGen/PowerPC/ppc32-i64-to-float-conv.ll
M llvm/test/CodeGen/PowerPC/ppc64-crsave.mir
Log Message:
-----------
[PPC][AIX] Add vector callee saved registers for AIX extended vector ABI
This patch is the initial patch for support of the AIX extended vector ABI. The extended ABI treats vector registers V20-V31 as non-volatile and we add them as callee saved registers in this patch.
Reviewed By: sfertile
Differential Revision: https://reviews.llvm.org/D88676
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