[all-commits] [llvm/llvm-project] 5931be: [DAGCombine][PowerPC] Convert negated abs to trivi...

[bzEq via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 5931be60b5238e5e134fcde75eb2d8121f3dca82
      https://github.com/llvm/llvm-project/commit/5931be60b5238e5e134fcde75eb2d8121f3dca82
  Author: Kai Luo <lkail at cn.ibm.com>
  Date:   2020-11-24 (Tue, 24 Nov 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/neg-abs.ll
    M llvm/test/CodeGen/PowerPC/neg-abs.ll
    M llvm/test/CodeGen/RISCV/neg-abs.ll

  Log Message:
  -----------
  [DAGCombine][PowerPC] Convert negated abs to trivial arithmetic ops

This patch converts `0 - abs(x)` to `Y = sra (X, size(X)-1); sub (Y, xor (X, Y))` for better codegen.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D91120