[all-commits] [llvm/llvm-project] 3701e3: [RISCV] Remove custom isel for (srl (shl val, 32), ...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3701e33a2213f2b2307d805bd843656bafcb60cf
      https://github.com/llvm/llvm-project/commit/3701e33a2213f2b2307d805bd843656bafcb60cf
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-11-04 (Wed, 04 Nov 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoB.td

  Log Message:
  -----------
  [RISCV] Remove custom isel for (srl (shl val, 32), imm). Use pattern instead. NFCI

We don't need custom matching, we just a need a predicate to check
the immediate is greater than 32. We can use the existing ImmSub32
to adjust the immediate.

I've also used the new predicate in the other location that used
ImmSub32. I tried to create a test case where we would break without
the greater than 32 check on that pattern, but DAG combine defeated me.
Still seemed safer to have it.

Differential Revision: https://reviews.llvm.org/D90546