[all-commits] [llvm/llvm-project] 58adab: [AMDGPU] Resolve pseudo registers at encoding uses
Joe Nash via All-commits
all-commits at lists.llvm.org
Wed Nov 4 09:56:20 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 58adab34c4801e835bf1a55efbd1213b201660fb
https://github.com/llvm/llvm-project/commit/58adab34c4801e835bf1a55efbd1213b201660fb
Author: Joe Nash <Joseph.Nash at amd.com>
Date: 2020-11-04 (Wed, 04 Nov 2020)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
Log Message:
-----------
[AMDGPU] Resolve pseudo registers at encoding uses
Pseudo-registers allow different register encodings
between gpu generations. Make sure we resolve the
pseudo regs to real regs whenever we get their
hardware encoding.
Using the correct encodings revealed a register
bank conflict and an unnecessary write dependency.
Tests have been updated to match.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D90721
Change-Id: I73c154cd24aecc820993b50bebaf4df97a5710ca
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