[all-commits] [llvm/llvm-project] 393b55: [AArch64][GlobalISel] Add combine for G_EXTRACT_VE...
AE via All-commits
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Tue Nov 3 17:25:44 PST 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 393b55380afcd8681db03dfbdea2f27ff3517d25
https://github.com/llvm/llvm-project/commit/393b55380afcd8681db03dfbdea2f27ff3517d25
Author: Amara Emerson <amara at apple.com>
Date: 2020-11-03 (Tue, 03 Nov 2020)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64InstrGISel.td
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-extractvec-faddp.mir
A llvm/test/CodeGen/AArch64/GlobalISel/select-faddp.mir
Log Message:
-----------
[AArch64][GlobalISel] Add combine for G_EXTRACT_VECTOR_ELT to allow selection of pairwise FADD.
For the <2 x float> case, instead of adding another combine or legalization to
get it into a <4 x float> form, I'm just adding a GISel specific selection
pattern to cover it.
Differential Revision: https://reviews.llvm.org/D90699
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