[all-commits] [llvm/llvm-project] fabd4c: [Statepoint] Always spill base pointer.

[dantrushin via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: fabd4c1ae1fc573eb83ba9541e133a265c5549da
      https://github.com/llvm/llvm-project/commit/fabd4c1ae1fc573eb83ba9541e133a265c5549da
  Author: Denis Antrushin <dantrushin at gmail.com>
  Date:   2020-08-28 (Fri, 28 Aug 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
    M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
    M llvm/test/CodeGen/X86/statepoint-vreg.ll

  Log Message:
  -----------
  [Statepoint] Always spill base pointer.

There is a subtle problem with new statepoint lowering scheme
when base and pointers are the same (see PR46917 for more context):

%1 = STATEPOINT ... %0, %0(tied-def 0)...

if, for some reason, register allocator desides to put two instances
of %0 into two different objects (registers or spill slots), we may
end up with

$reg3 = STATEPOINT ... $reg2, $reg1(tied-def 0)...

and nothing will prevent later passes to sink uses of $reg2 below
statepoint, which is incorrect.

As a short term solution, always put base pointers on stack during
lowering.
A longer term solution may be to rework MIR statepoint format to
avoid GC pointer duplication in statepoint argument list.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D86712