[all-commits] [llvm/llvm-project] 918231: [AMDGPU] Spill more than wavesize CSR SGPRs

[Saiyedul Islam via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 91823163955859abbdcad5901d765aeae860939e
      https://github.com/llvm/llvm-project/commit/91823163955859abbdcad5901d765aeae860939e
  Author: Saiyedul Islam <Saiyedul.Islam at amd.com>
  Date:   2020-07-01 (Wed, 01 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    A llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll

  Log Message:
  -----------
  [AMDGPU] Spill more than wavesize CSR SGPRs

In case of more than wavesize CSR SGPR spills, lanes of reserved VGPR were getting
overwritten due to wrap around.

Reserve a VGPR (when NumVGPRSpillLanes = 0, WaveSize, 2*WaveSize, ..) and when one
of the two conditions is true:
 1. One reserved VGPR being tracked by VGPRReservedForSGPRSpill is not yet reserved.
 2. All spill lanes of reserved VGPR(s) are full and another spill lane is required.

Reviewed By: arsenm, kerbowa

Differential Revision: https://reviews.llvm.org/D82463