[all-commits] [llvm/llvm-project] fa0da7: [PowerPC] Add support for llvm.ppc.dcbt, llvm.ppc....

[Amy Kwan via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: fa0da7ec6a3b6dafe5ddd33125264c4b131523c2
      https://github.com/llvm/llvm-project/commit/fa0da7ec6a3b6dafe5ddd33125264c4b131523c2
  Author: Amy Kwan <amy.kwan1 at ibm.com>
  Date:   2020-06-26 (Fri, 26 Jun 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    A llvm/test/CodeGen/PowerPC/dcbt.ll
    A llvm/test/CodeGen/PowerPC/isync.ll

  Log Message:
  -----------
  [PowerPC] Add support for llvm.ppc.dcbt, llvm.ppc.dcbtst, llvm.ppc.isync intrinsics

This patch adds LLVM intrinsics for the dcbt (Data Cache Block Touch),
dcbtst (Data Cache Block Touch for Store) and isync (Instruction
Synchronize) instructions.

The intrinsic for dcbt and dcbst in this patch are named llvm.ppc.dcbt.with.hint
and llvm.ppc.dcbtst.with.hint respectively as there already exists an intrinsic
for llvm.ppc.dcbt and llvm.ppc.dcbtst. However, the original variants of the
intrinsics do not accept the TH immediate field, whereas these variants do.

Differential Revision: https://reviews.llvm.org/D79633