[all-commits] [llvm/llvm-project] d32c13: [llvm][SVE] Reg + reg addressing mode for LD1RO.

[Francesco Petrogalli via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: d32c134648547a87199ff712f930fbc65e50060d
      https://github.com/llvm/llvm-project/commit/d32c134648547a87199ff712f930fbc65e50060d
  Author: Francesco Petrogalli <francesco.petrogalli at arm.com>
  Date:   2020-06-19 (Fri, 19 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll

  Log Message:
  -----------
  [llvm][SVE] Reg + reg addressing mode for LD1RO.

Reviewers: efriedma, sdesmalen

Reviewed By: efriedma

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80741