[all-commits] [llvm/llvm-project] 1fed13: [PowerPC] Canonicalize shuffles to match more sing...

[Nemanja Ivanovic via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 1fed131660b2c5d3ea7007e273a7a5da80699445
      https://github.com/llvm/llvm-project/commit/1fed131660b2c5d3ea7007e273a7a5da80699445
  Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
  Date:   2020-06-18 (Thu, 18 Jun 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.h
    M llvm/lib/Target/PowerPC/PPCInstrVSX.td
    M llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
    M llvm/test/CodeGen/PowerPC/build-vector-tests.ll
    M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
    M llvm/test/CodeGen/PowerPC/fp-strict-round.ll
    M llvm/test/CodeGen/PowerPC/load-and-splat.ll
    M llvm/test/CodeGen/PowerPC/load-v4i8-improved.ll
    M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
    M llvm/test/CodeGen/PowerPC/pr25080.ll
    M llvm/test/CodeGen/PowerPC/pr25157-peephole.ll
    M llvm/test/CodeGen/PowerPC/pr38087.ll
    M llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
    M llvm/test/CodeGen/PowerPC/qpx-load-splat.ll
    M llvm/test/CodeGen/PowerPC/scalar_vector_test_1.ll
    M llvm/test/CodeGen/PowerPC/scalar_vector_test_3.ll
    M llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
    M llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
    M llvm/test/CodeGen/PowerPC/swaps-le-5.ll
    M llvm/test/CodeGen/PowerPC/swaps-le-6.ll
    M llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
    M llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
    M llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
    M llvm/test/CodeGen/PowerPC/vsx.ll
    M llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll

  Log Message:
  -----------
  [PowerPC] Canonicalize shuffles to match more single-instruction masks on LE

We currently miss a number of opportunities to emit single-instruction
VMRG[LH][BHW] instructions for shuffles on little endian subtargets. Although
this in itself is not a huge performance opportunity since loading the permute
vector for a VPERM can always be pulled out of loops, producing such merge
instructions is useful to downstream optimizations.
Since VPERM is essentially opaque to all subsequent optimizations, we want to
avoid it as much as possible. Other permute instructions have semantics that can
be reasoned about much more easily in later optimizations.

This patch does the following:
- Canonicalize shuffles so that the first element comes from the first vector
  (since that's what most of the mask matching functions want)
- Switch the elements that come from splat vectors so that they match the
  corresponding elements from the other vector (to allow for merges)
- Adds debugging messages for when a shuffle is matched to a VPERM so that
  anyone interested in improving this further can get the info for their code

Differential revision: https://reviews.llvm.org/D77448