[all-commits] [llvm/llvm-project] 9f8b44: Extend max register size to accommodate AArch64 SV...

[Muhammad Omair Javaid via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 9f8b4472fb601fcee84613a558f8d734314d98b5
      https://github.com/llvm/llvm-project/commit/9f8b4472fb601fcee84613a558f8d734314d98b5
  Author: Muhammad Omair Javaid <omair.javaid at linaro.org>
  Date:   2020-04-29 (Wed, 29 Apr 2020)

  Changed paths:
    M lldb/include/lldb/Utility/RegisterValue.h
    M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
    M lldb/source/Utility/RegisterValue.cpp

  Log Message:
  -----------
  Extend max register size to accommodate AArch64 SVE vector regs

Summary: This patch increases maximum register size to 256 bytes to accommodate AArch64 SVE registers maximum possible size of 256 bytes.

Reviewers: labath, jankratochvil, rengolin

Reviewed By: labath

Subscribers: tschuett, kristof.beyls, danielkiss, lldb-commits

Differential Revision: https://reviews.llvm.org/D77044