[all-commits] [llvm/llvm-project] 84cd96: [X86] Add AddToWorklist(N) after calls to Simplify...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 84cd968f75bbd6e0fbabecc29d2c1090263adec7
      https://github.com/llvm/llvm-project/commit/84cd968f75bbd6e0fbabecc29d2c1090263adec7
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-02-22 (Sat, 22 Feb 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Add AddToWorklist(N) after calls to SimplifyDemandedBits/SimplifyDemandedVectorElts that are called on an operand of N.

If a simplication occurs the operand will be added to the worklist.
But since the demanded mask was based on N, we need to make sure
we revisit N in case there are more simplifications to be done.
Returning SDValue(N, 0) as we do, only tells DAG combine that
something changed, but that won't make it add anything to the
worklist.

Found while playing around with using VEXTRACT_STORE in more cases.
But I guess this doesn't affect any of our existing tests.


  Commit: 57923617181b0181e8d5c2f2e940a94a82737c7c
      https://github.com/llvm/llvm-project/commit/57923617181b0181e8d5c2f2e940a94a82737c7c
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-02-22 (Sat, 22 Feb 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll

  Log Message:
  -----------
  [X86] Add sse2 command lines to sse-intrinsics-fast-isel.ll.

The extra available vector types on sse2 causes us to produce
different code.


Compare: https://github.com/llvm/llvm-project/compare/bdb1729c8347...57923617181b