[all-commits] [llvm/llvm-project] d857e1: [ARM, MVE] Fix valid immediate range for vsliq_n.

[Simon Tatham via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: d857e114b5e04f5143485a5aea7ad9b283768692
      https://github.com/llvm/llvm-project/commit/d857e114b5e04f5143485a5aea7ad9b283768692
  Author: Simon Tatham <simon.tatham at arm.com>
  Date:   2020-01-09 (Thu, 09 Jan 2020)

  Changed paths:
    M clang/include/clang/Basic/arm_mve.td
    M clang/test/Sema/arm-mve-immediates.c

  Log Message:
  -----------
  [ARM,MVE] Fix valid immediate range for vsliq_n.

In common with most MVE immediate shift instructions, the left shift
takes an immediate in the range [0,n-1], while the right shift takes
one in the range [1,n]. I had absent-mindedly made them both the
latter.

While I'm here, I've added a set of regression tests checking both
ends of the immediate range for a representative sample of the
immediate shifts.


  Commit: 9704ba652a0062c53ec66b068766df5c0cd5c620
      https://github.com/llvm/llvm-project/commit/9704ba652a0062c53ec66b068766df5c0cd5c620
  Author: Simon Tatham <simon.tatham at arm.com>
  Date:   2020-01-09 (Thu, 09 Jan 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsARM.td

  Log Message:
  -----------
  [ARM,MVE] Add missing IntrNoMem flag on IR intrinsics.

A lot of the IR-level intrinsics we've been defining for MVE recently
accidentally had `props = []` instead of `props = [IntrNoMem]`, so
that optimization would have been overcautious about reordering them.

All the affected cases were due to instantiating the multiclasses
`MVEPredicated` and `MVEMXPredicated` without filling in the `props`
parameter, because I //thought// I remembered having set the defaults
in those multiclasses to `[IntrNoMem]`. In fact I hadn't done that.
Now I have.

(The IR intrinsics that //do// read and write memory are all
explicitly marked as `[IntrReadMem]` or `[IntrWriteMem]` already, so
they will override these defaults.)


Compare: https://github.com/llvm/llvm-project/compare/667e1f71b83c...9704ba652a00