[all-commits] [llvm/llvm-project] 914ce6: [MIPS GlobalISel] MSA vector generic and builtin f...

[petar-avramovic via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 914ce66413e9de560a4546e87cacbbecad4d63bb
      https://github.com/llvm/llvm-project/commit/914ce66413e9de560a4546e87cacbbecad4d63bb
  Author: Petar Avramovic <Petar.Avramovic at rt-rk.com>
  Date:   2019-10-24 (Thu, 24 Oct 2019)

  Changed paths:
    M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
    M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
    A llvm/test/CodeGen/Mips/GlobalISel/instruction-select/floating_point_vec_arithmetic_operations.mir
    A llvm/test/CodeGen/Mips/GlobalISel/legalizer/floating_point_vec_arithmetic_operations.mir
    A llvm/test/CodeGen/Mips/GlobalISel/legalizer/floating_point_vec_arithmetic_operations_builtin.mir
    A llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/floating_point_vec_arithmetic_operations.ll
    A llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/floating_point_vec_arithmetic_operations_builtin.ll
    A llvm/test/CodeGen/Mips/GlobalISel/regbankselect/floating_point_vec_arithmetic_operations.mir

  Log Message:
  -----------
  [MIPS GlobalISel] MSA vector generic and builtin fadd, fsub, fmul, fdiv

Select vector G_FADD, G_FSUB, G_FMUL and G_FDIV for MIPS32 with MSA. We
have to set bank for vector operands to fprb and selectImpl will do the
rest. __builtin_msa_fadd_<format>, __builtin_msa_fsub_<format>,
__builtin_msa_fmul_<format> and __builtin_msa_fdiv_<format> will be
transformed into G_FADD, G_FSUB, G_FMUL and G_FDIV in legalizeIntrinsic
respectively and selected in the same way.

Differential Revision: https://reviews.llvm.org/D69340