[all-commits] [llvm/llvm-project] e4af9d: [MIPS GlobalISel] Select MSA vector generic and bu...

[petar-avramovic via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e4af9de36ca60483040af381edd10e716e7b077d
      https://github.com/llvm/llvm-project/commit/e4af9de36ca60483040af381edd10e716e7b077d
  Author: Petar Avramovic <Petar.Avramovic at rt-rk.com>
  Date:   2019-10-22 (Tue, 22 Oct 2019)

  Changed paths:
    M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
    M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
    A llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll
    A llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
    A llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mir
    A llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mir
    A llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir
    A llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
    A llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.ll
    A llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mir

  Log Message:
  -----------
  [MIPS GlobalISel] Select MSA vector generic and builtin add

Select vector G_ADD for MIPS32 with MSA. We have to set bank
for vector operands to fprb and selectImpl will do the rest.
__builtin_msa_addv_<format> will be transformed into G_ADD
in legalizeIntrinsic and selected in the same way.
__builtin_msa_addvi_<format> will be directly selected into
ADDVI_<format> in legalizeIntrinsic. MIR tests for it have
unnecessary additional copies. Capture current state of tests
with run-pass=legalizer with a test in test/CodeGen/MIR/Mips.

Differential Revision: https://reviews.llvm.org/D68984

llvm-svn: 375501