[all-commits] [llvm/llvm-project] f7aec2: [NFC][InstCombine] conditional sign-extend of high...

[Roman Lebedev via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f7aec25d4fb193c2efb5c8bdcecd6d0611183bcc
      https://github.com/llvm/llvm-project/commit/f7aec25d4fb193c2efb5c8bdcecd6d0611183bcc
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2019-10-20 (Sun, 20 Oct 2019)

  Changed paths:
    M llvm/test/Transforms/InstCombine/conditional-variable-length-signext-after-high-bit-extract.ll

  Log Message:
  -----------
  [NFC][InstCombine] conditional sign-extend of high-bit-extract: 'and' pat. can be 'or' pattern.

In this pattern, all the "magic" bits that we'd add are all
high sign bits, and in the value we'd be adding to they are all unset,
not unexpectedly, so we can have an `or` there:
https://rise4fun.com/Alive/ups

llvm-svn: 375377