[llvm-dev] strange output from llvm-mc

[Craig Topper via llvm-dev]

Sorry I didn't closely at your command lines. I think you need to add
-x86-asm-syntax to your assembler command line to force it out of at&t
syntax into intel syntax.

~Craig


On Sun, May 12, 2019 at 9:36 PM Craig Topper <craig.topper at gmail.com> wrote:

> I believe -x86-asm-syntax controls the printer format for clang and llc
> and may not have any effect on llvm-mc.
>
> I'm looking to see if there is a command line option to control the parser
> syntax or if you have to use ".intel_syntax in the input"
>
> ~Craig
>
>
> On Sun, May 12, 2019 at 9:24 PM s nedunuri via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> It looks to me like llvm-mc is doing something strange. Eg:
>>
>>               echo "pop ebp" | llvm-mc -assemble -arch=x86 -filetype=obj
>> -o temp.bin
>>
>> Now disassembling temp.bin:
>>
>>
>>
>> $ llvm-objdump -disassemble -x86-asm-syntax=intel -section-headers
>> temp.bin
>>
>>
>>
>> temp.bin:       file format COFF-i386
>>
>>
>>
>> Disassembly of section .text:
>>
>> 0000000000000000 .text:
>>
>>        0:       8f 05 00 00 00 00       pop     dword ptr [0]
>>
>> Sections:
>>
>> Idx Name          Size      Address          Type
>>
>>   0 .text         00000006 0000000000000000 TEXT
>>
>>   1 .data         00000000 0000000000000000 DATA
>>
>>   2 .bss          00000000 0000000000000000 BSS
>>
>>
>>
>> Llvm-mc is generating the opcode 8f, which is why its getting
>> disassembled as “pop dword ptr [0]”. Looking at the intel reference for pop
>> you’ll see that the “8f” opcodes are for pops to memory locations, not to
>> registers. If I create a file "simple.s" containing "pop ebp" using a
>> different assembler (eg nasm) generates the correct opcode (5D):
>>
>>
>>
>> $ nasm -f win32 simple.s -l simple.lst
>>
>>
>>
>> $ more simple.lst
>>
>>      1 00000000 5D                      POP EBP
>>
>>
>> Anyone know what's going on? Did I miss a flag somewhere
>>
>> thanks
>>
>>
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>> llvm-dev at lists.llvm.org
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>>
>
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