[llvm-dev] Byte ordering during machine code generation
Eli Friedman via llvm-dev
llvm-dev at lists.llvm.org
Mon Jun 3 16:10:56 PDT 2019
The ARM backend does something similar to what you're describing for Thumb code; see ARMMCCodeEmitter::encodeInstruction.
From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Josh Sharp via llvm-dev
Sent: Monday, June 3, 2019 3:57 PM
To: via llvm-dev <llvm-dev at lists.llvm.org>
Subject: [EXT] [llvm-dev] Byte ordering during machine code generation
Is there a way to specify the byte ordering in a way that's neither big nor little endian during machine code generation?
For example, if B3B2B1B0 is a 32-bit instruction with B3 the most significant byte, is there a way to write it as B1 B0 B3 B2 ?
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