[llvm-dev] [LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
Sjoerd Meijer via llvm-dev
llvm-dev at lists.llvm.org
Tue Aug 13 11:44:13 PDT 2019
Ah yes, not exactly the same things, thanks for clarifying.
From: Michael Kruse <llvmdev at meinersbur.de>
Sent: 13 August 2019 19:29:15
To: Sjoerd Meijer <Sjoerd.Meijer at arm.com>
Cc: Finkel, Hal J. <hfinkel at anl.gov>; cameron.mcinally at nyu.edu <cameron.mcinally at nyu.edu>; llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org>; BHAVYA BAGLA <cs17btech11007 at iith.ac.in>; MAMIDALA SAI PRAHARSH <es17btech11013 at iith.ac.in>; HAPPY Mahto <cs17btech11018 at iith.ac.in>; YASHAS ANDALURI <es17btech11025 at iith.ac.in>
Subject: Re: [llvm-dev] [LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
Am Di., 13. Aug. 2019 um 11:59 Uhr schrieb Sjoerd Meijer via llvm-dev
<llvm-dev at lists.llvm.org>:
> vecremainder/novecremainder: Should the pragma simply call the vectorizer to attempt to vectorize the remainder loop, or should the vectorizer use a different method?
> > Something like that. There were patches posted at some point to enable tail-loop vectorization. At this point, I imagine that you'd construct a VPlan with the vectorized tail.
> Yep, committed in https://reviews.llvm.org/rL366989 and https://reviews.llvm.org/D65197.
> The pragma name is different, but I think it tries to achieve the same thing.
If I understand Intel's documentation correctly, these are different things:
vectorize.predicate.enable: Do not create an epilogue loop (use masked
instructions in the main loop instead)
vecremainder: If there is an epilogue loop, vectorize it as well
(which will require masked instructions in the epilogue, but not in
the main loop)
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