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Ah yes, not exactly the same things, thanks for clarifying.
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Michael Kruse <llvmdev@meinersbur.de><br>
<b>Sent:</b> 13 August 2019 19:29:15<br>
<b>To:</b> Sjoerd Meijer <Sjoerd.Meijer@arm.com><br>
<b>Cc:</b> Finkel, Hal J. <hfinkel@anl.gov>; cameron.mcinally@nyu.edu <cameron.mcinally@nyu.edu>; llvm-dev@lists.llvm.org <llvm-dev@lists.llvm.org>; BHAVYA BAGLA <cs17btech11007@iith.ac.in>; MAMIDALA SAI PRAHARSH <es17btech11013@iith.ac.in>; HAPPY Mahto <cs17btech11018@iith.ac.in>;
YASHAS ANDALURI <es17btech11025@iith.ac.in><br>
<b>Subject:</b> Re: [llvm-dev] [LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM</font>
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<div class="PlainText">Am Di., 13. Aug. 2019 um 11:59 Uhr schrieb Sjoerd Meijer via llvm-dev<br>
<llvm-dev@lists.llvm.org>:<br>
><br>
> vecremainder/novecremainder: Should the pragma simply call the vectorizer to attempt to vectorize the remainder loop, or should the vectorizer use a different method?<br>
><br>
> ><br>
><br>
> > Something like that. There were patches posted at some point to enable tail-loop vectorization. At this point, I imagine that you'd construct a VPlan with the vectorized tail.<br>
><br>
><br>
> Yep, committed in <a href="https://reviews.llvm.org/rL366989">https://reviews.llvm.org/rL366989</a> and
<a href="https://reviews.llvm.org/D65197">https://reviews.llvm.org/D65197</a>.<br>
><br>
> The pragma name is different, but I think it tries to achieve the same thing.<br>
<br>
If I understand Intel's documentation correctly, these are different things:<br>
<br>
vectorize.predicate.enable: Do not create an epilogue loop (use masked<br>
instructions in the main loop instead)<br>
vecremainder: If there is an epilogue loop, vectorize it as well<br>
(which will require masked instructions in the epilogue, but not in<br>
the main loop)<br>
<br>
Michael<br>
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