[llvm-dev] Can register class effect ISel pattern?

Joan Lluch via llvm-dev llvm-dev at lists.llvm.org
Thu Aug 1 00:27:43 PDT 2019

Hi Yu,

I don’t think that you can make LLVM to do it for you automatically based on the tablegen files alone, but you should be able to implement this in yourTargetDAGToDAGISel::Select function. Check for the ISD::ADD instruction to come, then replace it by your 'gpr-add', or ‘sgpr-add' instruction depending on its operands by calling CurDAG->SelectNodeTo.


> On 1 Aug 2019, at 05:31, Nancy via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> Hi,
> Can register class effect Instruction selection prefer in ISel pattern?
> Example:
> Same LLVM IR add instruction, same data type i32, different asm
> instruction, different register class  GPR,  SGPR
> if one operator comes from GPR register class, it selects GPR "add" instruction
> if all operators come from SGPR register class, it select SGPR "add" instruction
> -- 
> Best Regards,
> Yu Rong Tan
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