[llvm-dev] add new instruction format
Tim Northover via llvm-dev
llvm-dev at lists.llvm.org
Wed Jun 20 23:41:04 PDT 2018
On Thu, 21 Jun 2018 at 02:07, ComputerFreak via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> The thing is, llvm Store Format gets Register and Pointer Type Operand.
> beside this, RISC-V Store Instruction takes source Register, Base Register and offset immediate type. So this takes 3 leafs.
> In this case, should I make new SelectionDAG Node in this case?
If you're trying to write a pattern to select that kind of store, you
write a more complicated arithmetic pattern instead of a simple
register for the pointer on the source side. It's in RISCVInstrInfo.td
around lines 731 onwards, a little obfuscated by the multiclasses but
a simple example would be:
def : Pat<(store GPR:$rs2, (add GPR:$rs1, simm12:$imm12)), (SW $rs2,
Notice that where the "store" itself has declared it takes a pointer
we've got a more complex "add" expression which describes how the
RISC-V store instruction calculates its address.
> or use BuildMI Instruction to add new Register?
I'm afraid I don't understand how this could help.
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