[llvm-dev] Checking when Register Allocation has been performed
Martin J. O'Riordan via llvm-dev
llvm-dev at lists.llvm.org
Wed Jan 17 11:00:31 PST 2018
I suspect I am more worried than concerned, meaning that I accept that such calls “might be” possible, but I am also currently aware of none. But because I have no control (other than source editing) over the sequence of passes that occur between “pre-RA” scheduling and “post-RA” scheduling, I guess my concern is about being 100% sure about when RA happens.
I have not observed any current passes (other than frame lowering) that can cause lowering to occur between the two scheduling passes. I am quite happy to handle this with a flag which at the end of my “pre-RA” pass, assumes that RA is run. Worst case, slightly less efficient code. If there was something in TII, my preference is simple: ‘bool isPreRA() const’ and ‘bool isPostRA() const’, or something along those lines; not sure it would be appropriate to TII though, perhaps “MachineFunction”? Or even in the pass manager interface?
All the best,
From: mbraun at apple.com [mailto:mbraun at apple.com]
Sent: 17 January 2018 18:04
To: Martin J. O'Riordan <MartinO at theheart.ie>
Cc: Craig Topper <craig.topper at gmail.com>; LLVM Developers <llvm-dev at lists.llvm.org>
Subject: Re: [llvm-dev] Checking when Register Allocation has been performed
On Jan 16, 2018, at 11:31 PM, Martin J. O'Riordan <MartinO at theheart.ie <mailto:MartinO at theheart.ie> > wrote:
I have both a pre-RA and a post-RA scheduler, and I had thought that I could track “has RA happened?” by setting a flag in my pre-RA scheduler as it completes - my suspicion (which you have confirmed) was that “#vregs == 0” was not a safe assumption. What I cannot be sure of, is what passes execute after my pre-RA scheduler but before RA, and what passes execute after RA but before my post-RA scheduler since this is largely target-independent. If any of those passes trigger a custom lowering action (frame setup for example), and it requires additional scratch registers, then my code generation strategy needs to change. As it happens, I know that frame lowering always occurs post-RA so that is not a real example, but is it possible that another pass between pre-RA and post-RA scheduling could trigger lowering actions? If not, then setting a flag in my pre-RA scheduler will solve the problem perfectly.
Do you have a specific callback in TargetInstrInfo or similar in mind? I would expect them to either be used pre-ra or post-ra but not both...
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