[llvm-dev] Tablegen pattern: How to emit a SDNode in an output pattern?

[Nicolai Hähnle via llvm-dev]

Hi Max,

On 09.04.2018 10:17, Max Muster via llvm-dev wrote:
> I'm trying to write a tablegen pattern to that matches a sequence of 
> SDNodes and emits again an SDNode and another instruction.
> The pattern I've written looks like the folowing:
> 
> def : Pat<(foo (bar GPR:$rs1), simm12:$imm1),
>            (bar (BAZ GPR:$rs1, simm12:$imm1))>;
> 
> foo and bar are SDNodes, BAZ is an instruction. In particular, bar is 
> defined as follows:
> 
> def bar : SDNode<"ISD::BAR", SDTIntUnaryOp>;
> 
> The basic idea of this pattern is to propagate bar over certain 
> instructions until they reach a sink pattern, which only emits an 
> instruction.
> However, it seems that SDNodes in output patterns are not supported, 
> because when building LLVM, I get the following error message:
> 
> error: In anonymous_826: Cannot use 'bar' in an output pattern!
> 
> What are the limits of tablegen here?

This is technically not a limit of TableGen per se, but a limit of the 
DAG selection machinery. The -gen-dag-isel backend of TableGen generates 
a bytecode which is interpreted by the machinery in 
SelectionDAGISel::SelectCodeCommon, which is expected to generate 
machine nodes directly -- what you're trying to do would require some 
sort of recursion / iteration.


> What are alternatives to propagate the bar node over instructions to 
> reach the same behavior is the pattern-based approach?

It looks a bit like you want a kind of instcombine either before or 
after the instruction selection, but overall it's hard to say without a 
concrete problem description.

Cheers,
Nicolai




> 
> Thank you in advance!
> Cheers,
> Max
> 
> 
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