[llvm-dev] Tablegen pattern: How to emit a SDNode in an output pattern?

[Max Muster via llvm-dev]

I'm trying to write a tablegen pattern to that matches a sequence of
SDNodes and emits again an SDNode and another instruction.
The pattern I've written looks like the folowing:

def : Pat<(foo (bar GPR:$rs1), simm12:$imm1),
          (bar (BAZ GPR:$rs1, simm12:$imm1))>;

foo and bar are SDNodes, BAZ is an instruction. In particular, bar is
defined as follows:

def bar : SDNode<"ISD::BAR", SDTIntUnaryOp>;

The basic idea of this pattern is to propagate bar over certain
instructions until they reach a sink pattern, which only emits an
instruction.
However, it seems that SDNodes in output patterns are not supported,
because when building LLVM, I get the following error message:

error: In anonymous_826: Cannot use 'bar' in an output pattern!

What are the limits of tablegen here?
What are alternatives to propagate the bar node over instructions to reach
the same behavior is the pattern-based approach?

Thank you in advance!
Cheers,
Max
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