[llvm-dev] Backend for Non Load/Store Architecture

Tim Northover via llvm-dev llvm-dev at lists.llvm.org
Tue Mar 1 12:50:38 PST 2016


On 1 March 2016 at 10:48, Hakan Uyumaz via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> When you use an add operation with two operands which are A and B as above,
> it simply sums data on both memory block A and B then writes it into memory
> block B. So, you can do any operation without need of any register.

LLVM's IR is pretty strongly register-based, and programs' dependency
chains are often not directly compatible with 2-operand RMW either.

I'd probably designate a bunch of fixed memory (stack?) as
pseudo-registers. Loads and stores would then be turned into MOV
instructions. You'd probably need some pseudo-instruction variants of
your instructions to cope with the pseudo-register operands. These
could then be turned into the real ones after register allocation in a
custom pass (e.g. convert "%R0 = OPrm random_mem" into "OPmm
mem-for-R0, random_mem").

You'd probably also want a pass before register allocation to combine
redundant use of the special memory, but that could come later.

> Also, immediate operations have non-standard value (14-bit integer) as its
> immediate operand. Is there any simple way to use non-standard values?

So "add mem, #imm" only allows a 14-bit immediate? You normally just
use an i32 during CodeGen and check that it's a permitted value when
choosing that instruction variant (using ImmLeaf).

Cheers.

Tim.


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