[llvm-dev] zero_reg

[Sky Flyer via llvm-dev]

Oh, thanks a lot Matt. :-)

On Tue, Sep 22, 2015 at 10:19 AM, Matt Arsenault <arsenm2 at gmail.com> wrote:

>
> On Sep 22, 2015, at 1:12 AM, Sky Flyer via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
> Hi all,
>
> what is exactly "zero_reg"?
>
> from ARMInstFromats.td:
>
> *def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm), (ops (i32 14),
> (i32 zero_reg))> {...}*
>
> I thought zero_reg can be replace by a random name like (alu_stat_reg for
> alu state register) but when I compiled it, I figure out that zero_reg is a
> predefined variable.
>
> Can someone please give me more information about zero_reg and if possible
> more about PredicateOperand operands.
>
> Cheers,
> ES
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>
>
> This corresponds to NoRegister (this could use a rename). It allows you to
> emit an operand an an instruction pattern with an invalid register value
> which presumably something else expects to fill in later.
>
>
>
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