[LLVMdev] LowerINTRINSIC_W_CHAIN in X86

kewuzhang kewu.zhang at amd.com
Wed Jul 23 12:34:36 PDT 2014


Yeah.

I agree that "Chain operand is needed if the intrinsic is reading / writing memory.”, 
Just don’t know where and how to set it up.

like intrinsic “int_x86_xtest:
 “
def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">,
              Intrinsic<[llvm_i32_ty], [], []>;

“
"def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>,
                     [SDNPHasChain, SDNPSideEffect]>;
“

let Defs = [EFLAGS] in
def XTEST : I<0x01, MRM_D6, (outs), (ins),
              "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>;


which  CALL makes the “Intrinsic::x86_xtest” is caught under “INTRINSIC_W_CHAIN”? feel I missed something, but did not figure out.

tks

kevin

On Jul 23, 2014, at 1:16 PM, Anton Korobeynikov <anton at korobeynikov.info> wrote:

> Hello
> 
> Chain operand is needed if the intrinsic is reading / writing memory.
> 
> On Wed, Jul 23, 2014 at 8:02 PM, kewuzhang <kewu.zhang at amd.com> wrote:
>> Hi guys,
>> 
>> In X86ISelLowering.cpp
>> 
>> I saw”
>> ...
>> case Intrinsic::x86_rdrand_16:
>>  case Intrinsic::x86_rdrand_32:
>> ….
>> case Intrinsic::x86_avx512_gather_qpd_512:
>>  case Intrinsic::x86_avx512_gather_qps_512:
>> ..
>>>> those intrinsics are handled by “LowerINTRINSIC_W_CHAIN”.
>> 
>> How the “INTRINSIC_W_CHAIN” opCode is set instead of “INTRINSIC_WO_CHAIN”?
>> 
>> tks
>> 
>> Kevin
>> 
>> 
>> 
>> 
>> 
>> 
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>> 
> 
> 
> 
> -- 
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University

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