<html><head><meta http-equiv="Content-Type" content="text/html charset=windows-1252"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;">Yeah.<div><br></div><div>I agree that "Chain operand is needed if the intrinsic is reading / writing memory.”, </div><div>Just don’t know where and how to set it up.</div><div><br></div><div>like intrinsic “<font face="Menlo"><span style="font-size: 11px;">int_x86_xtest:</span></font></div><div> “</div><div><span style="font-family: Menlo; font-size: 11px;">def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">,</span></div><div style="margin: 0px; font-size: 11px; font-family: Menlo;"> Intrinsic<[llvm_i32_ty], [], []>;</div><div><br></div><div>“</div><div>"<span style="font-family: Menlo; font-size: 11px;">def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0, [SDTCisVT<0, i32>]>,</span></div><div style="margin: 0px; font-size: 11px; font-family: Menlo;"> [SDNPHasChain, SDNPSideEffect]>;</div><div style="margin: 0px; font-size: 11px; font-family: Menlo;">“</div><div style="margin: 0px; font-size: 11px; font-family: Menlo;"><br></div><div style="margin: 0px; font-size: 11px; font-family: Menlo;"><div style="margin: 0px;">let Defs = [EFLAGS] in</div><div style="margin: 0px;">def XTEST : I<0x01, MRM_D6, (outs), (ins),</div><div style="margin: 0px;"> "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>;</div><div><br></div></div><div><br></div><div>which CALL makes the “Intrinsic::x86_xtest” is caught under “INTRINSIC_W_CHAIN”? feel I missed something, but did not figure out.</div><div><br></div><div>tks</div><div><br></div><div>kevin</div><div><br><div><div>On Jul 23, 2014, at 1:16 PM, Anton Korobeynikov <<a href="mailto:anton@korobeynikov.info">anton@korobeynikov.info</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite">Hello<br><br>Chain operand is needed if the intrinsic is reading / writing memory.<br><br>On Wed, Jul 23, 2014 at 8:02 PM, kewuzhang <<a href="mailto:kewu.zhang@amd.com">kewu.zhang@amd.com</a>> wrote:<br><blockquote type="cite">Hi guys,<br><br>In X86ISelLowering.cpp<br><br>I saw”<br>...<br> case Intrinsic::x86_rdrand_16:<br> case Intrinsic::x86_rdrand_32:<br>….<br>case Intrinsic::x86_avx512_gather_qpd_512:<br> case Intrinsic::x86_avx512_gather_qps_512:<br>..<br>“<br>those intrinsics are handled by “LowerINTRINSIC_W_CHAIN”.<br><br>How the “INTRINSIC_W_CHAIN” opCode is set instead of “INTRINSIC_WO_CHAIN”?<br><br>tks<br><br>Kevin<br><br><br><br><br><br><br>_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu">http://llvm.cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br><br></blockquote><br><br><br>-- <br>With best regards, Anton Korobeynikov<br>Faculty of Mathematics and Mechanics, Saint Petersburg State University<br></blockquote></div><br></div></body></html>