[LLVMdev] Lowering to return multiple values: codeGen, instruction write one value to the input register.

[Tim Northover]

Hi Kevin,

It's quite difficult to tell exactly what's going wrong here without
more context. If you could post a screenshot (or similar) of the
viewDAG output before and after, that would be very helpful. Or
describe in more detail what you're expecting to see but don't.

On 11 July 2014 18:59, kewuzhang <kewu.zhang at amd.com> wrote:
> …….
> SDValue z = DAG.getNode(my_ISD::test_op, DL, VT, Op.getOperand(0);
> SDValue w = DAG.getConstant(1, MVT::i32);
>
> SDValue DataZ = DAG.getNode(ISD::BUILDER_VECTOR, DL, MVT::v4i32, z, z, z,
> z);
> SDValue DataW = DAG.getNode(ISD::BUILDER_VECTOR, DL, MVT::v4i32, w, w, w,
> w);
> SDValue result[] = {DataZ, DataW};
> return DAg.getMergeValues(results, 2, DL);
>
> “
> but my view-dag only shows one return value,  wondering what is wrong?
> should the results dags must be somehow “dependent” on each other?

However, as a very rough guess: did the input node have two outputs?
If not, then the second result of the merge node will be unused and
might appear not to be there.

Cheers.

Tim.